IEEE Distinguished Lecturer Series PLL Tutorial
Abstract
2009 Tutorial (Adobe PDF version (4.4MB) )
2007 Tutorial (Adobe PDF version (3.5MB) )
Abstract
Microsoft Powerpoint version (861KB)
Adobe PDF version (484KB)
ISSCC 2010 Paper 13.2: A 45nm SOI Dual-PLL Processor Clock System for Multi-Protocol I/O
Presentation Slides (Adobe PDF version (1.6MB)
CICC 2009 Paper 19.3: An On-Chip, All-Digital Measurement Circuit to Characterize PLL Loop Response in 45n SOI
Paper (Adobe PDF version (0.6MB)
Presentation Slides (Adobe PDF version (1.8MB) )
Frequently Asked PLL Questions
PLL Behavioral Simulation and Analysis
PLLUS - under construction
If you have questions, comments, or suggestions, email me at dennis.fischette@gmail.com