Q: Is there a downside of choosing a low
bandwidth and big multiplier? Can I do safely
achieve this with a small loop capacitor?

A: Large feedback multipliers are
necessary to ensure a safe oversampling ratio 
when the reference frequency is low 
or when you need high frequency resolution 
and don't want to use a fractional-N feedback 
divider.

Low bandwidth usually results in large 
phase error due to accumulated VCO noise.
This accumulated VCO noise may be random
or deterministic (effects of VDD noise).
In RAMDAC(CRT) applications, for example, 
this accumulated phase error can cause problems when
it is larger than a VCO cycle.

Also, remember the PLL is a sampled system.
The PLL doesn't correct phase error continuously.
It corrects at the reference rate. So, large
phase error (from reference or VCO drift) can result 
in significant VCO frequency modulation (period jitter) 
at the reference frequency. To avoid this, you need a larger
C2 capacitor to absorb the correction charge (Icp*Terr). 
But you can't have a large C2 cap without also having a large 
C1 cap. An alternative is a small charge-pump current or 
VCO gain. But small charge pump currents often lead to 
mismatch and charge injection. The VCO gain is usually 
determined more by the output frequency than the loop bandwidth. 
Generally, PLL's with big multiplier end up with larger loop 
filter resistors and capacitors to maintain good stability, 
decent oversampling, and low frequency modulation.